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https://texercises.com/exercise/full-adder-gate/
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Exercise:
A half-adder takes three inputs A and B are two singlbit-numbers to add and a carry-in C_i. It has two outputs: A S which is the result of the addition and a carry-out C which is the carry-out bit for the next addition. The S is if an odd number of inputs among A B and C_i are . The carry is if at least two of the inputs are . Construct a full-adder using only textttXOR textttOR and textttAND gates. Draw the circuit diagram for your half-adder.

Solution:
center circuitikzscale. % First XOR gate for A XOR B draw nodexor port xor ; nodeanchoreast at xor.in A; nodeanchoreast at xor.in B; nodeanchorsouth at xor.out A oplus B; % Second XOR gate for A XOR B XOR Cin Sum draw nodexor port xor ; nodeanchorsouth at xor.in A oplus B; nodeanchoreast at xor.in Cin; nodeanchorwest at xor.out S Sum; % First AND gate for A AND B draw - nodeand port and ; nodeanchoreast at and.in A; nodeanchoreast at and.in B; nodeanchorwest at and.out ; % Second AND gate for A XOR B AND Cin draw - nodeand port and ; nodeanchorsouth at and.in A oplus B; nodeanchoreast at and.in Cin; nodeanchorwest at and.out ; % OR gate for Carry-out draw - nodeor port or ; nodeanchorwest at or.out Cout Carry-out; % Connections draw xor.out -- xor.in ; % Connect A XOR B to second XOR gate draw xor.out -- ++.; % Sum output draw and.out -- ++. |- or.in ; % Connect A AND B to OR draw and.out -- ++. |- or.in ; % Connect A XOR B AND Cin to OR circuitikz center array|c|c|c|c|c| hline A & B & textCin & textSum S & textCout Carry-out hline & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & hline array
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Exercise:
A half-adder takes three inputs A and B are two singlbit-numbers to add and a carry-in C_i. It has two outputs: A S which is the result of the addition and a carry-out C which is the carry-out bit for the next addition. The S is if an odd number of inputs among A B and C_i are . The carry is if at least two of the inputs are . Construct a full-adder using only textttXOR textttOR and textttAND gates. Draw the circuit diagram for your half-adder.

Solution:
center circuitikzscale. % First XOR gate for A XOR B draw nodexor port xor ; nodeanchoreast at xor.in A; nodeanchoreast at xor.in B; nodeanchorsouth at xor.out A oplus B; % Second XOR gate for A XOR B XOR Cin Sum draw nodexor port xor ; nodeanchorsouth at xor.in A oplus B; nodeanchoreast at xor.in Cin; nodeanchorwest at xor.out S Sum; % First AND gate for A AND B draw - nodeand port and ; nodeanchoreast at and.in A; nodeanchoreast at and.in B; nodeanchorwest at and.out ; % Second AND gate for A XOR B AND Cin draw - nodeand port and ; nodeanchorsouth at and.in A oplus B; nodeanchoreast at and.in Cin; nodeanchorwest at and.out ; % OR gate for Carry-out draw - nodeor port or ; nodeanchorwest at or.out Cout Carry-out; % Connections draw xor.out -- xor.in ; % Connect A XOR B to second XOR gate draw xor.out -- ++.; % Sum output draw and.out -- ++. |- or.in ; % Connect A AND B to OR draw and.out -- ++. |- or.in ; % Connect A XOR B AND Cin to OR circuitikz center array|c|c|c|c|c| hline A & B & textCin & textSum S & textCout Carry-out hline & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & hline array
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Attributes & Decorations
Tags
algebra, and, bool, bool'sche, chip, circuit, computer, digital, digitalelektronik, elektronik, gate, logik, logische, not, or, schaltelement, schaltung
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(3, default)
Points
5 (default)
Language
ENG (English)
Type
Calculative / Quantity
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Decoration
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