Digitalelektronik 1
| Exercise Title | Attributes & Decoration | Points | Difficulty | |
|---|---|---|---|---|
| 1 | NOT aus NAND |
|
2 | 2 |
| 2 | AND aus NOT und NAND |
|
2 | 2 |
| 3 | a AND NOT b |
|
2 | 2 |
| 4 | OR aus AND, NOT und NAND |
|
2 | 2 |
| 5 | XOR aus AND, OR, NOT und NAND |
|
2 | 2 |
| 6 | XNOR aus AND, OR, XOR, NOT und NAND |
|
2 | 2 |
| 7 | Multiplexor-Gate from Basic-Gates |
|
5 | 3 |
| 8 | Demultiplexor-Gate from Basic-Gates |
|
5 | 3 |
| 9 | Half-adder gate from XOR and AND |
|
5 | 3 |
| 10 | Full-adder gate |
|
5 | 3 |
| 11 | Comparator gates |
|
3 | 1 |
| 12 | Single-bit storage gate |
|
2 | 1 |
| 13 | NAND-Gate aus Transistoren |
|
1 | 1 |
| 14 | Transistoren |
|
1 | 1 |
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| 2021-01-27 17:48 | 2024-11-19 20:20